Intel's "Ivy Bridge" 22nm refreshes of the Xeon E5-2600 and E5-1600 series CPUs have launched. We're excited by the increased performance, higher core counts, greater memory bandwidth, and excellent value for the dollar of these new Xeon E5-2600v2 and E5-1600v2 series products.
Higher core counts and increased clock speeds
Memory bandwidth increases for all SKUs
Excellent value for your compute dollar
Read our blog post for more information about the Xeon E5-2600v2 CPUs
The new Xeon E5-2600v2 CPUs support much of the same motherboard and platform infrastructure as their predecessors. The new CPUs are socket compatible with a BIOS upgrade, and many platforms are ready for DDR3-1866 memory speeds as well.
NumberSmasher 1U, 2U Xeon Phi Servers
NumberSmasher 1U, 2U, 3U, 4U HPC Servers
NumberSmasher 1U, 2U GPU Servers
Take a Test Drive of the new CPUs on our remote benchmark cluster today!
We have been featuring a GPU Performance Optimization Series on our HPC Tech Tips blog. These posts are intended for non-experts who are new to GPU programming or have a GPU application that doesn't achieve the best performance. Although the discussion is technical at times, the focus remains upon improvements that can be made without significant efforts. The goal is for readers to make the intelligent design choices which result in great performance (if not peak performance).
Read: CUDA Parallel Thread Management, Divergence and Profiling
Read: Profile CUDA Host-to-Device Transfers and Data Movement
Read: Optimize CUDA Host-to-Device Transfers
Read: GPU Memory Types and Memory Performance Comparison
Read: GPU Shared Memory Performance Optimization
Read: Avoiding GPU Memory Performance Bottlenecks
We'll be meeting on Tuesday October 22nd to discuss the SC13 Student Cluster Competition. Presentation topics include:
Learn more at http://www.meetup.com/HPC-GPU-Supercomputing-Group-of-Boston/events/141108502/
We've collected a number of the latest HPC technical resources below for your perusal.
Part 1: Coding The Future: Intel's Vision
Part 2: Vectorization using Intel Cilk Plus Array Notation in C++/C (Ideal for Xeon Phi Programmers)
Part 3: Vectorization with Pragmas in Fortran and C++/C (Ideal for Xeon Phi Programmers)
Part 4: Data alignment for effective vectorization in Fortran and C++/C (Ideal for Xeon Phi Programmers)
Part 5: Faster math performance with Intel Math Kernel Library (Ideal for Xeon Phi Programmers)
Part 6: Automatic offload with Intel Math Kernel Library (Ideal for Xeon Phi Programmers)
Part 7: Threading with OpenMP (OpenMP 4 Ready for Coprocessor Offload)
Part 8: Simplified threading with Intel Cilk Plus
Part 9: Threading with Intel Threading Building Blocks
Part 10: Performance analysis with Intel VTune Amplifier XE
Part 11: Distributed Computing with Intel MPI Library (Intel MPI and Xeon Phi Coprocessors)
October 9, 2013 (MP4 Replay) OpenACC 2.0 vs OpenMP 4.0 Programming Comparison
October 22, 2013, 12pm ET Introduction to SeqAn, an Open-source C++ Template Library
October 29, 2013, 1pm ET How to Improve Performance using the CUDA Memory Model and Features of the Kepler Architecture
November 6, 2013, 1pm ET Bright Cluster Manager: A CUDA-ready Management Solution for GPU-based HPC
Our WhisperStation - Maximus Editor's Pick of the Week was featured in the September Issue of Desktop Engineering
Learn why the Editor-at-Large featured WhisperStation - Maximus
For a full description from Desktop Engineering read the detailed specification article
Learn more about WhisperStation - Maximus at the new Microway.com
![]() |
|
sales@microway.com Eliot Eshelman at 508-732-5534 Brett Newman at 508-732-5542 Ted Fitts at 508-732-5516 GSA Schedule GS-35F-0431N |