Join us at the BioIT World Expo 2011 with your GPU computing questions. We're bringing some of our latest hardware with compelling demonstrations. 1,700+ life sciences, pharmaceutical, clinical, healthcare, and IT professionals will also be in attendance.


• April 12-14, World Trade Center, Boston
• For more information and conference registration, please click here

• 7 GPU Compute Nodes: each with 2 Tesla Fermi C2070s
• Delivered configured for life sciences software, including: AMBER, MATLAB, NAMD, and VMD
• 6272 CUDA cores with 14.42 TFLOPS of GPU performance (7.21 TFLOPS DP)
• 84 CPU Cores: 12 Intel Xeon CPU Cores per node at up to 3.06Ghz
• Microway 36 Port FasTree™ InfiniBand Switch
• Bright Cluster Manager™ with CentOS Linux installed and configured

Aquaporins make up an important family of proteins that allow water to pass through cell membranes, while blocking undesired ions and larger molecules. Our booth will feature a simulation of DNA being pulled through a synthetic nanopore using the latest NAMD software accelerated on CUDA GPUs. *

Equipment includes:


• WhisperStation Tesla- PSC with NVIDIA Quadro 6000 and Tesla C2050 GPUs
• NVIDIA 3D Vision Pro Technology for stunningly real 3D display

• AMBER 11 support with 10x speedup, including for MPI applications
• Molecular dynamics: NAMD, VMD, GROMACS
• Bio-Informatics: GPU HMMER, OpenEYE ROCS, CUDASW++

CUDA Programming Improvements
• No-copy pinning of system memory to GPU memory
• Unified virtual addressing for CPU/GPU memory in one memory space
• Sharing of GPUs across threads
• Single threads can access all GPUs
• C++ new/delete and virtual functions
• "Thrust" templates and libraries of optimized GPU code
GPU Direct 2.0
• Peer-to-peer communication between GPUs over PCI-E bus
• Direct memory transfers from device-to-device
GPU Image Processing
• JPEG processing
• Color space conversion, geometry transforms, and filter functions

  These changes and much, much more. Learn about CUDA 4.0 in this presentation; log into the CUDA Developer Portal for the download

In a column for HPC Wire, PGI Compiler Engineer Michael Wolfe explains and elaborates on the levels of parallelism required to program small workstations to Exascale systems. If you've searched for a resource to guide you through programming for increasing levels of parallelism, this is a great article you should read.


• Part 1: Levels of Parallelism in HPC systems
• Part 2: Programming at Exascale and using compilers