HPC with Intel Xeon Phi Processors and the MIC Architecture
Microway manufactures customized clusters, servers, and WhisperStations that leverage the Intel Xeon Phi processors and Intel’s software development tools.
The Xeon Phi is the first x86-based accelerator for heterogeneous HPC environments. Based upon the Many Integrated Core architecture (MIC), Xeon Phi is used to scale out traditional HPC systems. Phi offers a great balance of ease of use, performance, energy efficiency and cost in a solution optimized for highly-parallel HPC workloads.
Phi processors provide more efficient performance than traditional CPUs. They include many more and smaller cores, many more threads, and wider vector units well-suited to highly parallel workloads. Features of interest include:
- x86 Architecture with up to 72 cores
Simple 64-bit execution environment or new 512-bit vector processing unit (Xeon Phi instruction set) available on each core
- Over 3 TFLOPS double-precision floating point performance
Up to 4X the performance per watt of Xeon E5 family CPUs
- 16GB of high-speed MCDRAM memory with ECC
Up to 400+ GB/sec bandwidth to onboard memory
Familiar x86 programming environment with Fortran/C/C++ support, MPI, profiling and tuning tools
- Intel Math Kernel Library (MKL) support with support for AVX512
- Intel Parallel Studio XE supports developing and optimizing code for Xeon Phi processors explicitly
- Intel Cluster Studio XE with Intel MPI Library supports development for parallel clusters with Xeon Phi
- 3rd-party cluster software products: MPICH, Bright Cluster Manager, SLURM, PBS Professional, MOAB, Univa Grid Engine